Realization of Chip Downsizing and OEE Maximization
Proposals by Problems and Solutions
Do you face any of these problems?
- Recent changes in cars, developments in smartphones, expansion of IoT, and spread of 5G have led to thinner devices, shorter wiring, and smaller area for PCBs and components, thereby increasing the difficulty of mounting
- With micro components and high-density placement, PCB design and mask design can no longer be handled by existing rules
- At manufacturing sites, it is becoming more difficult to determine processes in printing, mounting, and bonding
Panasonic’s proposals for solving your problems
▲SPG2: Realization of Mass Customization in Manufacturing - Approaches to OEE Maximization
Approaches to micro component placement
The printing/placement/bonding processes are also important for micro component placement
For printing, printing difficulty is confirmed and conditions for solder and mask material are optimized
For placement, pickup/placement accuracy, nozzles, and optimal timing of working are the key points
Downsizing of chips
In downsizing, the amount of solder required for bonding is maintained
The amount of solder required for bonding each component is maintained through PCB design and mask design
Mask aperture and solder grain size are determined for micro components
OEE is the overall effectiveness of production equipment
1. Operation loss due to stoppage for setup, adjustment, etc.
2. Performance loss due to short time breakdown, stoppage for component supply, etc.
3. Defect loss due to stoppage caused by defects or yield
The key to maximizing OEE is how to reduce these losses